Examination Committee

Prof Jinyu HE, MGMT/HKUST (Chairperson)
Prof Wing Hung KI, ECE/HKUST (Thesis Supervisor)
Prof Yan LU, State Key Laboratory of Analog and Mixed-signal VLSI, University of Macau (Thesis Co-supervisor)
Prof Shu Hung Henry CHUNG, Dept. of Electronic Engineering, City University of Hong Kong (External Examiner)
Prof Philip MOK, ECE/HKUST
Prof Chi Ying TSUI, ECE/HKUST
Prof Lilong CAI, MAE/HKUST
 

Abstract

Fully-integrated DC-DC power converters are in great demand for implantable, wearable and portable devices. Switched-capacitor (SC) converters are good candidates as they only use capacitors that can be easily built on-chip. However, designing SC converters with high power density, high efficiency and low voltage ripple is challenging. In this research, a systematic study of SC DC-DC converters is presented. Design techniques are proposed and applied to various applications to tackle practical issues.
 
First, a 2-/3-phase fully-integrated SC DC-DC converter in 65nm bulk-CMOS is designed for low-power implantable devices. By using 3-phase operation, an additional voltage conversion ratio (VCR) of 1/4x is realized and improves the efficiency by 14%. A parasitic insensitive topology is proposed and achieves an efficiency improvement of 11%. Besides, a charge pump is used to provide high-voltage bias for integrated capacitor that reduces parasitic and further improves the efficiency by 3%.
 
Second, to further take advantages of 3-phase topologies, a 2-/3-phase 6-ratio switched-capacitor DC-DC converter in 0.13 µm bulk CMOS technology is designed. In total, there are four 2-phase VCRs and two 3-phase VCRs (1/4x and 3/4x). The power efficiency was improved by as much as 20% compared to 2-phase only topologies. The input voltage range is 1.6 V to 3.3 V, while the output voltage range is 0.5 V to 3 V. A digital ripple reduction scheme is also introduced to reduce the output voltage ripple up to 4 times of the original value at light load. The converter delivers a maximum power of 250 mW and achieves a peak efficiency of 91%.
 
Third, a fully integrated dual-output SC converter with dynamic power allocation for application processors is presented. The power cells can be dynamically allocated according to the loads, and improves the efficiency by 4.8% than without power-cell allocation. A dual-path voltage-control oscillator (VCO) that works independently of the power-cell allocation is proposed to achieve a fast and stable regulation loop. The converter achieved peak efficiency of 83.3% and maximum combined load-currents of 100mA while maintaining minimized cross regulation.
 
Finally, a fully-integrated active matrix light-emitting diode (AMLED) micro display system is presented. The system consists of 36x64 pixel-drivers encompassed by a fully on-chip hybrid voltage regulator built on the same silicon chip, then integrated with the AMLED array by using the flip-chip bonding technology. No external passive component is needed. The hybrid voltage regulator consists of a step-up switched-capacitor converter cascaded by a step-down linear regulator. The hybrid voltage regulator can handle the wide input range of the lithium-ion battery, and delivers a maximum power of 216 mW with 91% peak efficiency and 78% average efficiency.