Distinguished Lecture - Co-Packaged Optics 3D Heterogeneous Integration of Photonic IC and Electronic IC
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Silicon photonics is the semiconductor integration of EIC and PIC on a silicon substrate (wafer) with complementary metal-oxide semiconductor (CMOS) technology. On the other hand, co-packaged optics (CPO) are heterogeneous integration packaging methods to integrate the optical engine (OE), which consists of photonic ICs (PIC) and the electrical engine (EE) which consists of the electronic ICs (EIC) as well as the switch ASIC (application specific IC). The advantages of CPO are: (a) to reduce the length of the electrical interface between the OE/EE (or PIC/EIC) and the ASIC, (b) to reduce the energy required to drive the signal, and (c) to cut the latency which leads to better electrical performance. In the next few years, we will see more implementations of a higher level of heterogeneous integration of PIC and EIC, whether it is for performance, form factor, power consumption, or cost.
Dr. John H. Lau (Life Fellow, IEEE) received his Ph.D. degree from the University of Illinois at Urbana–Champaign, Champaign, IL, USA, in 1977. He was a Senior Scientist/MTS with the Hewlett-Packard Laboratory/Agilent, Palo Alto, CA, USA, for over 25 years. Dr. John H Lau, with more than 40 years of R&D and manufacturing experience in semiconductor packaging, has published more than 530 peer-reviewed papers (385 are the principal investigator), 52 issued and pending US patents (31 are the principal inventor), and 23 textbooks. Dr. John H Lau is an elected IEEE fellow, IMAPS Fellow, and ASME Fellow and has been actively participating in industry/academy/society meetings/conferences to contribute, learn, and share.
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Dr. Mian TAO, HKUST EPACK Lab