Name: PhD in Electronic & Comp Engg - Performance-Driven High-Level Synthesis on FPGA: Modeling, Optimization and Application
Start: 2020-07-29
End: 2020-07-29

PhD in Electronic & Comp Engg - Performance-Driven High-Level Synthesis on FPGA: Modeling, Optimization and Application

2020 年 7 月 29 日

2:00pm - 5:00pm

Room 2463 (Lifts 25-26), 2/F Academic Building, HKUST

活動形式

論文答辯

候選人

ZHAO, Jieru

語言

英文

English