Name: PhD in Electronic & Comp Engg - High-Efficiency Fully- and Highly-Integrated Switched-Capacitor DC-DC Converters
Start: 2017-08-03
End: 2017-08-03

PhD in Electronic & Comp Engg - High-Efficiency Fully- and Highly-Integrated Switched-Capacitor DC-DC Converters

2017 年 8 月 3 日

2:00pm - 5:00pm

Room 4621 (Lifts 31-32), 4/F Academic Building, HKUST

活動形式

論文答辯

候選人

JIANG, Junmin

語言

英文

English