Development of Advanced Gate Stacks and Passivation Techniques for GaN Power Transistors
10am
Room 2612A (Lifts 31 & 32), 2/F Academic Building, HKUST

Supporting the below United Nations Sustainable Development Goals:支持以下聯合國可持續發展目標:支持以下联合国可持续发展目标:

Examination Committee

Prof Jinglei YANG, MAE/HKUST (Chairperson)
Prof Kei May LAU, ECE/HKUST (Thesis Supervisor)
Prof Tat-Sing CHOW, Department of Electrical, Computer & Systems Engineering, Rensselaer Polytechnic Institute (External Examiner)
Prof Johnny SIN, ECE/HKUST
Prof Xinbo ZOU, ECE/HKUST
Prof Yi-Kuen LEE, MAE/HKUST
 

Abstract

GaN-based high electron mobility transistors (HEMTs) are emerging as one of the most promising candidates for high efficiency power switching applications, owing to their capability to deliver low on-resistance, high switching frequency, and high breakdown voltage. However, some key technical challenges are still present in state-of-the-art GaN HEMTs, preventing them from being widely adopted to the level as the industry is expecting. One of the challenges is the dynamic on-resistance degradation, also known as current collapse. Another challenge is the long term reliability, for which the most significant liability is the gate stack. Mitigating these two major challenges to advance the GaN HEMT technology for wide utilization motivates the research work in this thesis.
 
This thesis is devoted to the development of advanced gate stacks and passivation techniques to achieve stable device operation with minimal threshold voltage (Vth) shift and low current collapse in GaN HEMTs and metal-insulator-semiconductor HEMTs (MISHEMTs). First, a surface engineering process combining a pre-gate surface treatment and a post-gate thermal annealing was developed for Schottky gate HEMTs. High breakdown voltage (VBR) and low current collapse were achieved in the device. Secondly, in situ SiN was investigated systematically as the gate dielectric and surface passivation for GaN MISHEMTs. Minimal Vth shift was realized under long gate stress and high temperature operation. Taking the advantages of in situ SiN, high power MISHEMTs with a 20-mm gate width were demonstrated using a passivation-first process and a bilayer SiN passivation scheme, realizing low dynamic on-resistance and high VBR. Thirdly, atomic layer deposited high-k ZrO2 was developed as the gate dielectric for GaN MISHEMTs to enhance the gate control. A high on/off current ratio, a nearly ideal subthreshold slope, a high VBR, and suppressed current collapse were achieved simultaneously in the device. Power MISHEMTs with a 20-mm gate width were also demonstrated using the ZrO2 gate dielectric, exhibiting excellent switching characteristics. Finally, a novel enhancement-mode GaN MISHEMT was demonstrated, using an ultrathin-barrier AlGaN/GaN heterostructure, selective area barrier regrowth, and high-k ZrO2 gate dielectric. A uniform and large positive Vth was achieved as a result of the high quality gate stack in the MISHEMTs.

講者/ 表演者:
Huaxing JIANG
語言
英文