Department of Electronic and Computer Engineering Seminar - Energy-Efficient Hybrid In-Memory Computing with CMOS and Emerging Nanotechnologies for Edge Artificial Intelligence

Deep neural networks are getting complex and fuel the explosion of parameters. Efficiently implementing the large-scale NNs at the resource-constrained edge devices is pivotal for widespread AI applications. Computing-in-Memory (CIM) is an efficient solution to accelerate NNs by merging the dominant matrix-vector-multiplication operations into memories. Among various memory types, the non-volatile resistive RAM (ReRAM) emerges as high-density on-chip storage with limited endurance, while the SRAM possess high data-access performance at cost of large cell area. As a new paradigm of CIM beyond the single memory type, hybrid memories in-computing brings new opportunities to boost the energy efficiency of large NN acceleration.     

In this talk, several hybrid CIM design techniques with CMOS and emerging nanotechnologies will be presented. First, we will review the latest development in hybrid CIM. Then, we will present a new non-volatile SRAM-CIM (nvSRAM-CIM) macro and architecture design by combining non-volatile high-density ReRAM devices with robust and energy-efficient SRAM cells for large NN inference. After that, we will introduce another new design on hybrid three-dimension RRAM- and SRAM-CIM architecture for multi-task transformer acceleration based on a CIM-friendly transfer learning algorithm. Finally, perspectives of circuit designs for future edge AI will be discussed.