Examination Committee

Prof Philip MOK, ECE/HKUST (Chairperson)
Prof Mansun CHAN, ECE/HKUST (Thesis Supervisor)
Prof Andrew POON, ECE/HKUST
 
 

Abstract

Due to the geometry scaling in advantaged technology node, the current density increases significant in interconnects. The ITRS roadmap predicts that all interconnects with minimum size are going to be affected by electromigration (EM) by 2018. This stimulates the needs for accurate EM simulation. Time-dependent degradation feature plays an important role in EM simulation with high accuracy, because that modern design philosophies, signal-dependent effects, and structure dependency in EM can only be incorporated into simulation that captures the time-dependent feature of EM. 
 
Based on above reason, a dynamic time evolution method (DTEM) to simulate the time-dependent interconnect degradation due to electromigration was developed. The method has a new reliability simulation framework that is based on circuit simulator SPICE. The framework requires a physical void evolution model to trace the wire resistance increase over time.  The proposed method together with void evolution model shown significant improvement in predicting the lifetime of interconnects, compared with traditional method. With the void evolution model ready, the dynamic signal-dependent effects like self-heating can be incorporated. The simulation results show significant lifetime deduction with considering the self-heating of interconnects, which highlights the importance of self-heating in EM simulation. 
 
The structure-dependent degradation mechanisms were systematically considered. The mechanisms include reservoir and sink effect, atom flux divergence at via and up-stream and down-stream. For each one of them, example was given to show the importance of considering such effect.
 
Afterwards, a circuit degradation simulator was built up based on SPICE. The parameters input and output through Netlist were introduced in detail. The simulator was used to simulate the degradation in delay in a clock distribution network to show its capability. The simulation results have been compared with conventional EM verification approach and shown to be more accurate and be powerful in simulating pre-failure degradation.