Online Joint Seminar by HKUST-ACE and EDSSC - Cross-Layer Design for Search-in-Memory using Ferroelectric FET

As Moore’s law-based device scaling and accompanying performance scaling trends slow down, and the rapid growth of data-intensive applications in the era of “Internet of Things” and “Big Data”, there are increasing interests in emerging technologies and computational paradigms that enable more efficient information processing. Meanwhile, in the context of traditional Boolean circuits and/or von Neumann architectures, it is challenging for beyond-CMOS devices to compete with the CMOS technology as simple replacements. Exploiting the unique characteristics of emerging devices – especially in the context of alternative circuits and architectural paradigms – indicates a promising approach to further improve the information processing capability of hardware.  In this talk, I will show how our research work has leveraged the unique characteristics of emerging devices to build efficient circuits and architectures with significant improvements in area, energy and performance. Specifically, I will consider Ferroelectric FETs (FeFETs) which are nonvolatile and can function as both a transistor and a storage element. This unique property enables FeFETs to be used for building efficient computing-in-memory (CiM) circuits called content addressable memories (CAMs). CAMs perform the parallel search function across the memory blocks, thus are desirable in many applications including IP routers and advanced machine learning hardware. Using models calibrated by experimentally fabricated devices as well as cross-layer design approaches, we show that the FeFET-based CAM designs could enable orders of magnitude improvements in energy efficiency and performance when considering application-level computing tasks.