MPhil in Electronic & Comp Engg - A Low Bitwidth CNN Accelerator on FPGA Using Winograd and Block Floating Point Arithmetic

Name: MPhil in Electronic & Comp Engg - A Low Bitwidth CNN Accelerator on FPGA Using Winograd and Block Floating Point Arithmetic
Start: 2021-08-02
End: 2021-08-02

2 August 2021

2:00pm - 5:00pm

Scheduled Zoom Meeting: https://hkust.zoom.us/j/91394518606?pwd=bFZ2dEI0bjRwZXplTXc0L21PNEZYQT09 (Meeting ID: 913 9451 8606, Passcode: 519644), HKUST

Event Format

Thesis Defense

Candidate

WONG, Yuk

Language

English