Public Research Seminar by Microelectronics Thrust, Function Hub, HKUST (GZ) - Energy Efficient Edge Computing for Smart Applications in the Post-Moore Era
Smart applications such as robot and advanced driver assistance have significantly made our life easier and better. For the sake of various constraints such as real time, many of these applications involve computing in mobile edge devices. These devices are usually powered by batteries that require energy efficient computing to enable longer interval between the charging of batteries. On the other hand, new semiconductor technology (such as non-volatile memories, cryogenic microelectronics) and new computing paradigm (such as in-memory computing and neural network computing) have been actively researched to support energy efficient computing.
Under this background, this talk introduces the on-going research works in the Smart and Reconfigurable Computing Lab, ShanghaiTech University. In terms of applications, we have focused on the area of robot and smart vehicles. In terms of circuit/semiconductor technologies, we have focused on RRAM, cryogenic CMOS, near/sub-threshold low voltage circuit designs. In terms of computing paradigm, we have focused on SRAM-based in-memory computing and FPGA acceleration of neural networks. We have also built an FPGA research platform and a smart vehicle research platform. They enable us to interact these above topics and perform interdisciplinary research and prototyping.
Yajun Ha received the B.S. degree from Zhejiang University, Hangzhou, China, in 1996, the M.Eng. degree from the National University of Singapore, Singapore, in 1999, and the Ph.D. degree from Katholieke Universiteit Leuven, Leuven, Belgium, in 2004, all in electrical engineering. He is currently a Professor at ShanghaiTech University, China. Before this, he was a Scientist and Director, I2R-BYD Joint Lab at Institute for Infocomm Research, Singapore, and an Adjunct Associate Professor at the Department of Electrical & Computer Engineering, National University of Singapore. Prior to this, he was an Assistant Professor with National University of Singapore. His research interests are focused on energy efficient circuits and systems, including reconfigurable computing, ultra-low power digital circuits and systems, embedded system architecture and design tools for applications in robots, smart vehicles and intelligent systems. He has published more than 130 internationally peer-reviewed journal/conference papers on these topics. He is the recipient of 2021 NSFC Senior Foreign Scholar Fund.
He has served a number of positions in the professional communities. He serves as the Editor-in-Chief for the IEEE Trans. on Circuits and Systems II: Express Briefs (2022–2023), Associate Editor-in-Chief for the IEEE Trans. on Circuits and Systems II: Express Briefs (2020–2021), the Associate Editor for the IEEE Trans. on Circuits and Systems I: Regular Papers (2016–2019), the Associate Editor for the IEEE Trans. on Circuits and Systems II: Express Briefs (2011–2013), the Associate Editor for the IEEE Trans. on Very Large Scale Integration (VLSI) Systems (2013–2014), and the Journal of Low Power Electronics (since 2009). He has served as the TPC Co-Chair of ISICAS 2020, the General Co-Chair of ASP-DAC 2014; Program Co-Chair for FPT 2010 and FPT 2013; Chair of the Singapore Chapter of the IEEE Circuits and Systems (CAS) Society (2011 and 2012); Member of ASP-DAC Steering Committee; and Member of IEEE CAS VLSI and Applications Technical Committee. He has been the Program Committee Member for a number of well-known conferences in the fields of FPGAs and design tools, such as DAC, DATE, ASP-DAC, FPGA, FPL and FPT. He is the recipient of several IEEE/ACM Best Paper Awards. He is a senior member of IEEE.