Integrated Memory Device Technology
Memory is an important component in computer architecture as well as logic circuits, and it becomes even more important for data-intensive AI applications. There are several types of memory device, such as SRAM, DRAM, NAND flash memory, and other emerging memories. For memory device, high density and high capacity are the most important factor. It is not an exaggeration to say that CMOS scaling is preceded by memory device scaling. We can learn practical lessons and insights on device integration from memory device technology.
In this lecture, you will learn basic operation principle, device design, and device integration process of major memory device technologies.
Zoom meeting passcode: elec5070
Dr. Masaharu Kobayashi is currently an associate professor of System Design Lab (d.lab), School of engineering, The University of Tokyo. After graduating Stanford University in 2010, he joined IBM Watson Research Center as a research staff member (proper), where he was engaged in 14nm SOI CMOS technology development including finfet, high-k/metal-gate and eDRAM. He was also working for pathfinding of beyond 10nm technology node such as nanowire transistor and Ge/III-V CMOS technology. In 2014, he joined Institute of Industrial Science, The University of Tokyo, as an associate professor. In 2019, he joined VDEC and then d.lab. His research interest is next generation transistor and memory device technologies, and integrated nanoelectronic devices for energy-efficient computing. He is currently serving for memory technology subcommittee chair of IEDM, technical program committee member of VLSI Symposium. He is a member of IEEE and JSAP.
This is also a Guest Lecture of ELEC5070.
Enquiry : Prof. Man Wong / Ms. Venus Pang (eevenus@ust.hk)