IEEE CEDA Distinguished Lecture - Variation-Tolerant and Error-Resilient Many-Core SoCs with Fine-Grain Power Management

10:00am - 11:30am
Rm 4472, 4/F (Lift 25, 26), Academic Building

Many-core system-on-chip (SoC) architecture and design challenges and opportunities spanning edge devices to cloud computing systems in scaled CMOS process are presented. Key techniques for robust and variation-tolerant logic, embedded memory arrays and on-die interconnect fabrics are discussed. Fine-grain multi-voltage design and power management techniques, featuring integrated voltage regulators for wide dynamic voltage-frequency operating range and flexible platform power control across multi-threaded high-throughput near-threshold voltage(NTV) to single-threaded burst performance modes, are elucidated. Smart variation-aware workload mapping, runtime self-adaptation and error detection and recovery schemes to mitigate impacts of process-voltage-temperature (PVT) variations and aging, and achieve maximum performance under stringent thermal and energy constraints, are presented. Latest advances in design and process/package for realization of monolithic and heterogeneous 2D/3D-integrated compact, efficient, low supply noise, fine-grain, high-bandwidth and fast-response power converters and voltage regulators, essential for implementing intelligent system-level power management and adaptation schemes across hardware and software, are also highlighted. Real SoC examples are used to demonstrate leading-edge practical systems.  

讲者/ 表演者:
Dr. Vivek De
Intel Fellow and Director of Circuit Technology Research in Intel Labs

Vivek De is an Intel Fellow and Director of Circuit Technology Research in Intel Labs. He is responsible for leading and inspiring long-term research in future circuit technologies and design techniques for system-on-chip (SoC) designs with focus on energy efficiency. He has 353 publications in refereed international conferences and journals with a citation H-index of 86, and 241 patents issued with 25 more patents filed (pending). He received an Intel Achievement Award for his contributions to an integrated voltage regulator technology. He is the recipient of the 2019 IEEE Circuits and System Society (CASS) Charles A. Desoer Technical Achievement Award for “pioneering contributions to leading-edge performance and energy-efficient microprocessors & many-core system-on-chip (SoC) designs” and the 2020 IEEE Solid-State Circuits Society (SSCS) Industry Impact Award for “seminal impact and distinctive contributions to the field of solid-state circuits and the integrated circuits industry”. He received a Best Paper Award at the 1996 IEEE International ASIC Conference, and nominations for Best Paper Awards at the 2007 IEEE/ACM Design Automation Conference (DAC) and 2008 IEEE/ACM International Conference on Computer-Aided Design (ICCAD). He also co-authored a paper nominated for the Best Student Paper Award at the 2017 IEEE International Electron Devices Meeting (IEDM). One of his publications was recognized in the 2013 IEEE/ACM Design Automation Conference (DAC) as one of the "Top 10 Cited Papers in 50 Years of DAC". Another one of his publications received the “Most Frequently Cited Paper Award” in the IEEE Symposium on VLSI Circuits at its 30th Anniversary in 2017. He was recognized as a Top 10 Contributor to the IEEE International Solid-State Circuits Conference (ISSCC) at its 70th Anniversary in 2023 and a Prolific Contributor at its 60th Anniversary in 2013. He was also recognized as a Top 10 Contributor to the IEEE Symposium on VLSI Circuits at its 30th Anniversary in 2017. He received the Outstanding Evening Session Award at the 2018 International Solid-State Circuits Conference (ISSCC). He served as an IEEE/EDS Distinguished Lecturer in 2011, an IEEE/SSCS Distinguished Lecturer in 2017-18, an IEEE/CASS Distinguished Lecturer in 2020-22 and an IEEE/CEDA Distinguished Lecturer in 2023-24. He received the 2017 Distinguished Alumnus Award from the Indian Institute of Technology (IIT) Madras. He received a B.Tech from IIT Madras, India, a MS from Duke University, Durham, North Carolina, and a PhD from Rensselaer Polytechnic Institute, Troy, New York, all in Electrical Engineering. He is a Fellow of the IEEE.