Department of Electronic and Computer Engineering Seminar - Accelerator Programming for Data Specialization

2:00pm - 3:00pm
Rm 2463, 2/F (Lift 25 26), Academic Building, HKUST

In today's computing landscape, applications are highly data-intensive, while hardware is becoming ever more heterogeneous. Achieving high performance and efficiency requires tailoring data formats, placements, and numeric types to suit both applications and hardware. However, current programming models and compilers lack adequate support for data specialization, presenting a daunting challenge that remains out of reach for most programmers to address.

This talk discusses our ongoing research on evolvable data specialization, employing a co-design methodology spanning programming models, compilers, and hardware acceleration. I'll introduce UniSparse (OOPSLA'24), an intermediate language offering a unified abstraction for customizing sparse matrix/tensor formats. Unlike existing frameworks, UniSparse separates logical representation from low-level memory layout, facilitating concise format customizations through well-defined primitives. We validate our approach through experiments on various hardware targets, including an Intel CPU, an NVIDIA GPU, an AMD FPGA, and a simulated processing-in-memory (PIM) device. Then, I'll cover Allo (PLDI'24), a new programming model and compiler for building efficient dataflow accelerators. Allo decouples specification of custom data types and data placement from algorithm specification, and encapsulates them as a set of composable primitives. Our evaluation shows that Allo can significantly outperform state-of-the-art high-level synthesis tools and accelerator design languages on commonly used benchmarks. Allo also enables productive generation of complex model-specific LLM accelerators on FPGAs, producing low latency and high energy efficiency compared to commercial GPUs.

Event Format
Speakers / Performers:
Prof. Zhiru Zhang
School of Electrical and Computer Engineering, Cornell University

Zhiru Zhang is an Associate Professor in the School of ECE at Cornell University. He is also a theme lead of the SRC/DARPA JUMP 2.0 ACE Center for Evolvable Computing. His current research investigates new algorithms, design methodologies, and automation tools for heterogeneous computing. Dr. Zhang is an IEEE Fellow and has been honored with the Intel Outstanding Researcher Award, AWS AI Amazon Research Award, Facebook Research Award, Google Faculty Research Award, DAC Under-40 Innovators Award, DARPA Young Faculty Award, IEEE CEDA Ernest S. Kuh Early Career Award, and NSF CAREER Award. He has also received multiple best paper awards from premier computer hardware conferences and research journals. Prior to joining Cornell, he co-founded AutoESL, a high-level synthesis start-up later acquired by Xilinx (now part of AMD). AutoESL's HLS tool evolved into Vivado HLS (now Vitis HLS), which is widely used for designing FPGA-based hardware accelerators.

Recommended For
Faculty and staff
PG students
Department of Electronic & Computer Engineering
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